Lectures and exercises |
hours |
Topics |
Specific contents |
|
General purpose DSP architectures |
DSP Datapath and instruction set. Addressing and memory organization. Pipeline. |
8
|
Architectural synthesis |
Abstraction levels and views. Graph generalities. Abstract models for architectural synthesis. Synthesis and optimization. Algorithms for the architectural level synthesis. |
8
|
DSP Systems |
Scheduling. Graph transformations. Resource allocation. Balancing. Occupation and performance estimation. |
8
|
Processing elements |
Numerical representations. Parallel arithmetic. Serial arithmetic. Distributed arithmetic. The CORDIC algorithm. |
6
|
Placement and implementation |
Floor planning. Placement. Routing. Algorithms. Application of the methodologies to a case study. |
5
|
VHDL supplement |
Complete the study of the VHDL language. |
5
|
Total hours for lectures and exercises |
40 |
for exercises only |
20 |
Further educational activities
|
hours
|
Labs |
10 |
Tutorials / Seminars |
0 |
Workshops |
0 |
Guided tours |
0 |
|
0 |
Total hours for further educational activities |
10 |
Total hours |
50
|