| Lectures and exercises |
hours |
| Topics |
Specific contents |
|
| Optimization of finite state machines |
Minimization of incompletely specified finite state machines.
State assignment.
Choice of flip-flops.
|
6
|
| Programmable Logic |
Implementation of combinatorial devices through memories, PLA, PAL, FPGA |
2
|
| Logic and arithmetic circuits |
Adders: ripple carry, manchester carry chain, carry skip, carry select, carry lookahead.
Multipliers: matrix, carry save, Wallace algorithm, Booth encoding. |
2
|
| Datapath |
General purpose datapath. Evaluation of development choices. Control Word. Pipeline. |
4
|
| Control Unit |
Control Unit. ASM charts. |
4
|
| Special purpose processors |
Design of Control Unit and Datapath.
Microprogramming: microprogrammed control unit. |
8
|
| General purpose processors |
Single-cycle architecture.
Multi-cycle architecture, hardwired and microprogrammed control. |
6
|
| CISC e RISC Processors |
Design of RISC processors. Pipeline hazards.
RISC architecture examples: MIPS and ARM. |
4
|
| Memory hierarchy |
Caches (associative, DM, set-associative) |
2
|
| Quantitative analysis |
Integrated circuit's costs. |
4
|
| Total hours for lectures and exercises |
42 |
| for exercises only |
|
|
Further educational activities
|
hours
|
| Labs |
|
| Tutorials / Seminars |
|
| Workshops |
|
| Guided tours |
|
| |
|
| Total hours for further educational activities |
0 |
| Total hours |
42
|